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  - Verilog/SystemVerilog/VHDL tutorial
    Verilog/SystemVerilog/VHDL tutorial
    
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    Design: 🕸️ Network-on-Chip
    Design: 🕸️ Network-on-Chip
    
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    Standalone RTL design
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    1. Create a project
    
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    Simple SoC
    Simple SoC
    
    1. Create a project
    
    2. Port to SDK
    
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    LIF neuron on MicroZed
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  - Spiking Neural Network
    Spiking Neural Network
    
    Introduction
    
    Neurons
    
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    Izhikevich
    
    SNNTorch
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    Official tutorial
    
    Bindsnet
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    Spiking Jelly
    Spiking Jelly
    
    1.1 Time-step
    
    1.2 Using neuron
    
    1.3 Input size and net reset
    
    3.1 Revisit LIF neuron
    
    3.2 Revisit LIF neuron part 2
    
    3.3 Design your neuron
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